1794 search results - page 266 / 359 » Visualizing Memory Graphs |
122
Voted
ICCD
2001
IEEE
15 years 11 months ago
2001
IEEE
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
103
Voted
FCCM
2009
IEEE
15 years 9 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
89
Voted
ICRA
2009
IEEE
15 years 9 months ago
2009
IEEE
— One of the common applications for outdoor robots is to follow a path in large scale unknown environments. This task is challenging due to the intensive memory requirements to ...
132
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IEEEPACT
2009
IEEE
15 years 9 months ago
2009
IEEE
Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level parallelism (TLP) but do not...
138
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ICCS
2009
Springer
15 years 9 months ago
2009
Springer
Irregular and sparse scientific computing programs frequently experience performance losses due to inefficient use of the memory system in most machines. Previous work has shown t...