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CPAIOR
2007
Springer
15 years 9 months ago
Cost-Bounded Binary Decision Diagrams for 0-1 Programming
Abstract. In recent work binary decision diagrams (BDDs) were introduced as a technique for postoptimality analysis for integer programming. In this paper we show that much smaller...
Tarik Hadzic, John N. Hooker
138
Voted
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
15 years 9 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
156
Voted
BMCBI
2008
211views more  BMCBI 2008»
15 years 3 months ago
CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment
Background: Searching for similarities in protein and DNA databases has become a routine procedure in Molecular Biology. The Smith-Waterman algorithm has been available for more t...
Svetlin Manavski, Giorgio Valle
101
Voted
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 9 months ago
Instruction trace compression for rapid instruction cache simulation
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...
150
Voted
PASTE
1999
ACM
15 years 7 months ago
Identifying Procedural Structure in Cobol Programs
The principal control-flow abstraction mechanism in the Cobol language is the PERFORM statement. Normally, PERFORM statements are used in a straightforward manner to define para...
John Field, G. Ramalingam