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» Web-Based Feature Reduction System: A Case Study
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TCAD
2011
14 years 4 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
91
Voted
ICC
2007
IEEE
124views Communications» more  ICC 2007»
15 years 4 months ago
Optimal Scheduling Policy Determination for High Speed Downlink Packet Access
— In this paper, we present an analytic model and methodology to determine optimal scheduling policy that involves two dimension space allocation: time and code, in High Speed Do...
Hussein Al-Zubaidy, Jerome Talim, Ioannis Lambadar...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
15 years 1 months ago
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications
Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed t...
Alexandros Bartzas, Stylianos Mamagkakis, Georgios...
ESTIMEDIA
2008
Springer
14 years 12 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
ICWS
2007
IEEE
14 years 11 months ago
Capacity Management and Demand Prediction for Next Generation Data Centers
Advances in server, network, and storage virtualization are enabling the creation of resource pools of servers that permit multiple application workloads to share each server in t...
Daniel Gmach, Jerry Rolia, Ludmila Cherkasova, Alf...