570 search results - page 87 / 114 » Web-Based Feature Reduction System: A Case Study |
DSD
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
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CSREAESA
2010
14 years 8 months ago
2010
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
KBSE
2007
IEEE
15 years 4 months ago
2007
IEEE
As part of the evolution of software systems, effort is often invested to discover in what parts of the source code a feature (or other concern) is implemented. Unfortunately, kn...
IWPC
2006
IEEE
15 years 4 months ago
2006
IEEE
One of the important activities in re-engineering process is detecting design flaws. Such design flaws prevent an efficient maintenance, and further development of a system. Th...
ENTCS
2007
14 years 10 months ago
2007
The timed concurrent constraint programming language (tccp in short) was introduced for modeling reactive systems. This language allows one to model in a very intuitive way typica...