Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limi...
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
Greg Semeraro, David H. Albonesi, Steve Dropsho, G...
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
A generalized dynamic energy performance scaling (DEPS) framework is proposed for exploring applicationspecific energy-saving potential in hard real-time embedded systems. This so...
Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Tohr...