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100
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ISQED
2006
IEEE
15 years 7 months ago
2006
IEEE
Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. This paper develops closed-form models to predict the dela...
SBACPAD
2006
IEEE
15 years 7 months ago
2006
IEEE
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
115
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ACG
2006
Springer
15 years 7 months ago
2006
Springer
Abstract. Progressive Pruning (PP) is used in the Monte-Carlo go playing program Indigo. For each candidate move, PP launches random games starting with this move. PP gathers stati...
ASPDAC
2006
ACM
15 years 7 months ago
2006
ACM
— Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O(mn) time algorithm for optimal buffer insertion, where m is the numbe...
123
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ASPDAC
2006
ACM
15 years 7 months ago
2006
ACM
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...