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DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 6 months ago
A reconfigurable cache memory with heterogeneous banks
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
15 years 6 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...
APSEC
2002
IEEE
15 years 6 months ago
Using Process Simulation to Compare Scheduling Strategies for Software Projects
We present a discrete simulation model for software projects which explicitly takes a scheduling strategy as input. The model represents varying staff skill levels, component coup...
Frank Padberg
COOPIS
2002
IEEE
15 years 6 months ago
Well-Founded Optimism: Inheritance in Frame-Based Knowledge Bases
Abstract. F-logic is a popular formalism for knowledge-intensive applications and, especially, for ontology management in Semantic Web. However, the original F-logic’s semantics ...
Guizhen Yang, Michael Kifer
EDOC
2002
IEEE
15 years 6 months ago
Discretionary Enforcement of Electronic Contracts
As in traditional commerce, parties to a contract in ebusiness environments are expected to operate in good faith and comply with mutually agreed terms of contract. It may be the ...
Zoran Milosevic, Audun Jøsang, Theodosis Di...