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ISPD
1997
ACM
186views Hardware» more  ISPD 1997»
15 years 1 months ago
EWA: exact wiring-sizing algorithm
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
Rony Kay, Gennady Bucheuv, Lawrence T. Pileggi
CGI
1998
IEEE
15 years 1 months ago
Graph-Based Surface Reconstruction Using Structures in Scattered Point Sets
We present an algorithm for the reconstruction of a surface from an unorganized set of points in space. The point data may be obtained from a laser range scanner or any other digi...
Robert Mencl, Heinrich Müller
ICRA
2003
IEEE
156views Robotics» more  ICRA 2003»
15 years 2 months ago
Wet Shape Memory Alloy Actuators for Active Vasculated Robotic Flesh
− A new type of actuator is presented where Shape Memory Alloy (SMA) wires are embedded within artificial “blood vessels.” Fluid flowing through vessels allows the SMA wires ...
Stephen A. Mascaro, H. Harry Asada
DAC
1999
ACM
15 years 10 months ago
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
Chung-Ping Chen, Noel Menezes
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
15 years 10 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...