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» Wireplanning in logic synthesis
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AINA
2007
IEEE
15 years 1 months ago
Specification Synthesis for Monitoring and Analysis of MANET Protocols
This paper introduces an approach to automatic synthesis of the specification models of routing protocol behavior from the observed flow of the network traffic. In particular, our...
Natalia Stakhanova, Samik Basu, Wensheng Zhang, Xi...
ASYNC
2001
IEEE
164views Hardware» more  ASYNC 2001»
15 years 1 months ago
Synthesis and Implementation of a Signal-Type Asynchronous Data Communication Mechanism
This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...
Alexandre Yakovlev, Fei Xia, Delong Shang
CCE
2008
14 years 10 months ago
Optimal synthesis of heat exchanger networks involving isothermal process streams
This paper proposes a new MINLP model for heat exchanger network synthesis that includes streams with phase change. The model considers every possible combination of process strea...
José María Ponce-Ortega, Arturo Jim&...
ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
15 years 3 months ago
A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline
Much attention has been directed to different aspects of the design of pipelines [1,2,3,4]. Design of the control logic of non-linear pipelines has however, been considered as a su...
Hashem Hashemi Najaf-abadi
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
15 years 1 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski