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    CIIA
    2009
    138views Information Technology» more  CIIA 2009»
    Physical Synthesis for CPLD Architectures
    14 years 10 months ago
    Physical Synthesis for CPLD Architectures
    Download  sunsite.informatik.rwth-aachen.de
    In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
    Sid-Ahmed Senouci
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    TCAD
    2008
    116views more  TCAD 2008»
    Scalable Synthesis and Clustering Techniques Using Decision Diagrams
    14 years 9 months ago
    Scalable Synthesis and Clustering Techniques Using Decision Diagrams
    Download  www.eecg.toronto.edu
    BDDs have proven to be an efficient means to represent and manipulate Boolean formulae [1] and sets [2] due to their compactness and canonicality. In this work, we leverage the eff...
    Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
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    CCE
    2005
    96views Software Engineering» more  CCE 2005»
    Logic-based outer approximation for globally optimal synthesis of process networks
    14 years 9 months ago
    Logic-based outer approximation for globally optimal synthesis of process networks
    Download  egon.cheme.cmu.edu
    Process network problems can be formulated as Generalized Disjunctive Programs where a logicbased representation is used to deal with the discrete and continuous decisions. A new ...
    María Lorena Bergamini, Pío A. Aguir...
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    DAC
    2005
    ACM
    93views Computer Architecture» more  DAC 2005»
    Temperature-aware resource allocation and binding in high-level synthesis
    15 years 10 months ago
    Temperature-aware resource allocation and binding in high-level synthesis
    Download  www.ece.northwestern.edu
    Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
    Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
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    DAC
    2006
    ACM
    126views Computer Architecture» more  DAC 2006»
    Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming
    15 years 10 months ago
    Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming
    Download  www.inesc-id.pt
    In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowl...
    Eduardo A. C. da Costa, José Monteiro, Leve...
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