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» Wireplanning in logic synthesis
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VMCAI
2009
Springer
15 years 4 months ago
Synthesizing Switching Logic Using Constraint Solving
A new approach based on constraint solving techniques was recently proposed for verification of hybrid systems. This approach works by searching for inductive invariants of a give...
Ankur Taly, Sumit Gulwani, Ashish Tiwari
IOLTS
2008
IEEE
83views Hardware» more  IOLTS 2008»
15 years 4 months ago
On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD
Sets of Pairs of Functions to be Distinguished (SPFD) is a functional flexibility representation method that was recently introduced in the logic synthesis domain, and promises s...
Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, ...
ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
15 years 2 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
15 years 2 months ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
15 years 6 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...