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» Work Stealing Technique and Scheduling on the Critical Path
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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
14 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
CATA
2010
14 years 11 months ago
Mixed-criticality Scheduling: Improved Resource-augmentation Results
Many safety-critical embedded systems are subject to certification requirements; some systems may be required to meet multiple sets of certification requirements, from different c...
Sanjoy K. Baruah, Haohan Li, Leen Stougie
SPAA
1995
ACM
15 years 1 months ago
Provably Efficient Scheduling for Languages with Fine-Grained Parallelism
Many high-level parallel programming languages allow for fine-grained parallelism. As in the popular work-time framework for parallel algorithm design, programs written in such lan...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias
ISQED
2007
IEEE
162views Hardware» more  ISQED 2007»
15 years 4 months ago
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...
VISUALIZATION
1999
IEEE
15 years 2 months ago
Feature Comparisons of 3-D Vector Fields Using Earth Mover's Distance
ct A method for comparing three-dimensional vector fields constructed from simple critical points is described. This method is a natural extension of the previous work [1] which de...
Rajesh Batra, Lambertus Hesselink