The distortion caused by an interactive fisheye lens can make it difficult for people to remember items and locations in the data space. In this paper we introduce the idea of vis...
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
Interconnect speeds currently surpass the abilities of today’s processors to satisfy their demands. The throughput rate provided by the network simply generates too much protoco...
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
It is well known that n integers in the range [1, nc ] can be sorted in O(n) time in the RAM model using radix sorting. More generally, integers in any range [1, U] can be sorted i...
Gianni Franceschini, S. Muthukrishnan, Mihai Patra...