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125
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ICS
1999
Tsinghua U.
15 years 7 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
140
Voted
RIDE
1998
IEEE
15 years 7 months ago
Performance Enhancement Using Intra-server Caching in a Continuous Media Server
Continuity of stream playback is the crucial constraint in designing a continuous media server. From a distributed memory architectural model developed earlier, we found that ther...
Chutimet Srinilta, Alok N. Choudhary
137
Voted
ICCD
1997
IEEE
123views Hardware» more  ICCD 1997»
15 years 7 months ago
A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
John A. Chandy, Prithviraj Banerjee
164
Voted
MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
15 years 7 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
RTAS
1997
IEEE
15 years 7 months ago
OS-Controlled Cache Predictability for Real-Time Systems
3rd IEEE Real-time Technology and Applications Symposium (RTAS), June 1997 in Montreal, Canada Cache-partitioning techniques have been invented to make modern processors with an e...
Jochen Liedtke, Hermann Härtig, Michael Hohmu...