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RTAS
2010
IEEE
15 years 1 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
HPCA
2003
IEEE
16 years 3 months ago
Memory System Behavior of Java-Based Middleware
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
Martin Karlsson, Kevin E. Moore, Erik Hagersten, D...
SC
1995
ACM
15 years 6 months ago
Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
Umakishore Ramachandran, Gautam Shah, Anand Sivasu...
SIGMETRICS
2005
ACM
120views Hardware» more  SIGMETRICS 2005»
15 years 8 months ago
Automatic measurement of memory hierarchy parameters
The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowled...
Kamen Yotov, Keshav Pingali, Paul Stodghill
ICANN
2005
Springer
15 years 8 months ago
A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks
Many approaches have emerged in the attempt to explain the memory process. One of which is the Theory of Neuronal Group Selection (TNGS), proposed by Edelman [1]. In the present wo...
Rogério M. Gomes, Antônio de Pá...