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ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 23 hour ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
117
Voted
MICRO
2009
IEEE
144views Hardware» more  MICRO 2009»
15 years 9 months ago
Characterizing flash memory: anomalies, observations, and applications
Despite flash memory’s promise, it suffers from many idiosyncrasies such as limited durability, data integrity problems, and asymmetry in operation granularity. As architects, ...
Laura M. Grupp, Adrian M. Caulfield, Joel Coburn, ...
IISWC
2009
IEEE
15 years 9 months ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
CF
2007
ACM
15 years 7 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
RAID
2010
Springer
15 years 1 months ago
Kernel Malware Analysis with Un-tampered and Temporal Views of Dynamic Kernel Memory
Dynamic kernel memory has been a popular target of recent kernel malware due to the difficulty of determining the status of volatile dynamic kernel objects. Some existing approach...
Junghwan Rhee, Ryan Riley, Dongyan Xu, Xuxian Jian...