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ERSA
2010
199views Hardware» more  ERSA 2010»
15 years 1 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
ARC
2006
Springer
124views Hardware» more  ARC 2006»
15 years 7 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
PDPTA
1997
15 years 4 months ago
DIPC: A System Software Solution for Distributed Programming
Distributed Inter-Process Communication (DIPC) provides the programmers of the Linux operating system with distributed programming facilities, including Distributed Shared Memory ...
Kamran Karimi, Mohsen Sharifi
EUROPAR
2008
Springer
15 years 5 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
FSE
2011
Springer
218views Cryptology» more  FSE 2011»
14 years 6 months ago
Practical Near-Collisions and Collisions on Round-Reduced ECHO-256 Compression Function
In this paper, we present new results on the second-round SHA-3 candidate ECHO. We describe a method to construct a collision in the compression function of ECHO-256 reduced to fou...
Jérémy Jean, Pierre-Alain Fouque