Sciweavers

5962 search results - page 974 / 1193
» Working with Patterns and Code
Sort
View
ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
15 years 8 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
15 years 8 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
ADAEUROPE
1997
Springer
15 years 8 months ago
On Programming Atomic Actions in Ada 95
Abstract. This paper describes the development of two kinds of atomic action schemes for Ada 95. We start by discussing the basic features required of an atomic action scheme and w...
Alexander B. Romanovsky, Stuart E. Mitchell, Andy ...
HICSS
1996
IEEE
86views Biometrics» more  HICSS 1996»
15 years 8 months ago
Towards a Thread-Based Parallel Direct Execution Simulator
Parallel direct execution simulation is an important tool for performance and scalability analysis of large message passing parallel programs executing on top of a virtual compute...
Phillip M. Dickens, Matthew Haines, Piyush Mehrotr...
HPDC
1996
IEEE
15 years 8 months ago
Customized Dynamic Load Balancing for a Network of Workstations
Load balancing involves assigning to each processor, work proportional to its performance, minimizing the execution time of the program. Althoughstatic load balancing can solve ma...
Mohammed Javeed Zaki, Wei Li, Srinivasan Parthasar...