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» Workload-based optimization of integration processes
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CASES
2009
ACM
15 years 2 months ago
Complete nanowire crossbar framework optimized for the multi-spacer patterning technique
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this...
M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf ...
ICPR
2010
IEEE
15 years 2 months ago
Driver Body-Height Prediction for an Ergonomically Optimized Ingress Using a Single Omnidirectional Camera
Maximizing passengers comfort is an important research topic in the domain of automotive systems engineering. In particular, an automatic adjustment of seat position according to d...
Christian Scharfenberger, Samarjit Chakraborty, Ge...
TCAD
2008
93views more  TCAD 2008»
14 years 9 months ago
Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source--shallow trench isolation (STI)...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
COST
2009
Springer
184views Multimedia» more  COST 2009»
15 years 4 months ago
Cross-Layer Optimization Issues for Realizing Transparent Mesh Optical Networks
In transparent optical networks as the signal propagates through a transparent network it experiences the impact of a variety of quality degrading phenomena that are introduced by ...
Siamak Azodolmolky, Tibor Cinkler, Dimitrios Kloni...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
15 years 3 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...