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FDL
2003
IEEE
15 years 2 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...
DATE
2008
IEEE
110views Hardware» more  DATE 2008»
15 years 4 months ago
Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set
One of the upcoming challenges in embedded processing is to incorporate an increasing amount of adaptivity in order to respond to the multifarious constraints induced by today’s...
Lars Bauer, Muhammad Shafique, Stephanie Kreutz, J...
FPL
2008
Springer
175views Hardware» more  FPL 2008»
14 years 11 months ago
File system access from reconfigurable FPGA hardware processes in BORPH
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
Hayden Kwok-Hay So, Robert W. Brodersen
DATE
2007
IEEE
81views Hardware» more  DATE 2007»
15 years 4 months ago
Improving utilization of reconfigurable resources using two dimensional compaction
Partial reconfiguration allows parts of the reconfigurable chip area to be configured without affecting the rest of the chip. This allows placement of tasks at run time on the rec...
Ahmed A. El Farag, Hatem M. El-Boghdadi, Samir I. ...
84
Voted
ECEASST
2008
112views more  ECEASST 2008»
14 years 9 months ago
Flexible Modeling of Emergency Scenarios using Reconfigurable Systems
In emergency scenarios we can obtain a more effective coordination among team members constituting a mobile ad hoc network (MANET) through the use of reconfigurable systems. This ...
Kathrin Hoffmann, Hartmut Ehrig, Julia Padberg