A static analysis design is sufficient if it can prove the property of interest with an acceptable number of false alarms. Ultimately, the only way to confirm that an analysis d...
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...
Executable models are increasingly being employed by development teams to implement robust software systems. Modern executable models offer powerful composition mechanisms that al...
The backends of today’s Internet services rely heavily on caching at various layers both to provide faster service to common requests and to reduce load on back-end components. ...
Alexander Rasmussen, Emre Kiciman, V. Benjamin Liv...