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» XTR Implementation on Reconfigurable Hardware
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IPPS
2005
IEEE
15 years 5 months ago
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
Michalis D. Galanis, Athanasios Milidonis, George ...
ASAP
2007
IEEE
203views Hardware» more  ASAP 2007»
15 years 3 months ago
Reconfigurable Universal Adder
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
Humberto Calderon, Georgi Gaydadjiev, Stamatis Vas...
ISMVL
2000
IEEE
121views Hardware» more  ISMVL 2000»
15 years 4 months ago
Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, comments o...
Adrian Stoica
AAAI
1998
15 years 1 months ago
Evolvable Hardware Chip for High Precision Printer Image Compression
This paper describes a data compression chip for the high-precision electrophotographic printer using Evolvable Hardware (EHW). EHW is a new hardware paradigm which combines Genet...
Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, ...
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
15 years 4 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...