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DATE
2000
IEEE
113views Hardware» more  DATE 2000»
15 years 8 months ago
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
André Hergenhan, Wolfgang Rosenstiel
HPCA
2001
IEEE
16 years 4 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
LCTRTS
2009
Springer
15 years 11 months ago
Addressing the challenges of DBT for the ARM architecture
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
Ryan W. Moore, José Baiocchi, Bruce R. Chil...
BTW
2007
Springer
190views Database» more  BTW 2007»
15 years 10 months ago
Web Services and Data Caching for Java Mobile Clients
Web services are becoming more and more pervasive and are used by a number of information system clients. However, mobile clients still have limited computing and network resource...
Alexandru Caracas, Iulia Ion, Mihaela Ion
117
Voted
APCSAC
2003
IEEE
15 years 9 months ago
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory, with a TLB caching page translations for that main mem...
Philip Machanick, Zunaid Patel