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MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
15 years 9 months ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
SAC
2006
ACM
15 years 10 months ago
Hardware/software 2D-3D backprojection on a SoPC platform
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
Nicolas Gac, Stéphane Mancini, Michel Desvi...
CODES
2009
IEEE
15 years 8 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
IEEEPACT
2006
IEEE
15 years 10 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
VLSID
2002
IEEE
130views VLSI» more  VLSID 2002»
16 years 4 months ago
Using Randomized Rounding to Satisfy Timing Constraints of Real-Time Preemptive Tasks
In preemptive real-time systems, a tighter estimate of the Worst Case Response Time(WCRT) of the tasks can be obtained if the layout of the tasks in memory is included in the esti...
Anupam Datta, Sidharth Choudhury, Anupam Basu