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HICSS
1999
IEEE
121views Biometrics» more  HICSS 1999»
15 years 2 months ago
Evaluation of the JIAJIA Software DSM System on High Performance Computer Architectures
Distributed Shared Memory (DSM) combines the scalability of loosely coupled multicomputer systems with the ease of usability of tightly coupled multiprocessors, and allows transpa...
M. Rasit Eskicioglu, T. Anthony Marsland, Weiwu Hu...
STOC
2006
ACM
121views Algorithms» more  STOC 2006»
15 years 3 months ago
On adequate performance measures for paging
Memory management is a fundamental problem in computer architecture and operating systems. We consider a two-level memory system with fast, but small cache and slow, but large mai...
Konstantinos Panagiotou, Alexander Souza
HPCA
2007
IEEE
15 years 10 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...
SIGMOD
2002
ACM
108views Database» more  SIGMOD 2002»
15 years 10 months ago
An adaptive peer-to-peer network for distributed caching of OLAP results
Peer-to-Peer (P2P) systems are becoming increasingly popular as they enable users to exchange digital information by participating in complex networks. Such systems are inexpensiv...
Panos Kalnis, Wee Siong Ng, Beng Chin Ooi, Dimitri...
EMSOFT
2007
Springer
15 years 4 months ago
WCET estimation for executables in the presence of data caches
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Rathijit Sen, Y. N. Srikant