1000 search results - page 20 / 200 » Yield-Aware Cache Architectures |
ASPDAC
2009
ACM
14 years 9 months ago
2009
ACM
The proliferation of Chip Multiprocessors (CMPs) has led to the integration of large on-chip caches. For scalability reasons, a large on-chip cache is often divided into smaller ba...
MICRO
1999
IEEE
15 years 4 months ago
1999
IEEE
Instruction supply is a crucial component of processor performance. Instruction prefetching has been proposed as a mechanism to help reduce instruction cache misses, which in turn...
DATE
1997
IEEE
15 years 4 months ago
1997
IEEE
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...
123
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ANCS
2010
ACM
14 years 9 months ago
2010
ACM
TCP/IP, the most commonly used network protocol, consumes a significant portion of time in Internet servers. While a wide spectrum of studies has been done to reduce its processin...
108
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IADIS
2003
15 years 1 months ago
2003
Systems consisting of multiple proxy servers are a popular solution to deal with performance and network resource utilization problems related to the growth of the Web numbers. Af...