1000 search results - page 83 / 200 » Yield-Aware Cache Architectures |
ICS
2001
Tsinghua U.
15 years 2 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
CSC
2009
14 years 11 months ago
2009
Random walk simulation is employed in many experimental algorithmic applications. Efficient execution on modern computer architectures demands that the random walk be implemented t...
ICOIN
2005
Springer
15 years 3 months ago
2005
Springer
The Web is rapidly increasing its reach beyond the desktop to various devices and the transcoding proxy is appeared to support web services efficiently. Recently, the cooperative t...
101
click to vote
IEEEPACT
2002
IEEE
15 years 2 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...