711 search results - page 104 / 143 » Yield-aware placement optimization |
146
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DASFAA
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract. In emerging data stream applications, data sources are typically distributed. Evaluating multi-join queries over streams from different sources may incur large communica...
98
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ASPDAC
2004
ACM
15 years 8 months ago
2004
ACM
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
128
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ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
120
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
121
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ICCAD
2000
IEEE
15 years 7 months ago
2000
IEEE
In this paper, we present simulation techniques to estimate the worst-case voltage variation using a RC model for the power distribution network. Pattern independent maximum envel...