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» Yield-aware placement optimization
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SLIP
2005
ACM
15 years 7 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 7 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
DAC
2003
ACM
16 years 2 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
DAC
2003
ACM
16 years 2 months ago
Design techniques for sensor appliances: foundations and light compass case study
We propose the first systematic, sensor-centric approach for quantitative design of sensor network appliances. We demonstrate its use by designing light appliance devices and the ...
Jennifer L. Wong, Seapahn Megerian, Miodrag Potkon...
ICCD
2006
IEEE
183views Hardware» more  ICCD 2006»
15 years 11 months ago
An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
Sanjay Pant, David Blaauw