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» Yield-aware placement optimization
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PDP
2010
IEEE
15 years 4 months ago
hwloc: A Generic Framework for Managing Hardware Affinities in HPC Applications
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
François Broquedis, Jérôme Cle...
99
Voted
ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
15 years 4 months ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
ICDCS
1999
IEEE
15 years 4 months ago
Active Correlation Tracking
We describe methods of identifying and exploiting sharing patterns in multi-threaded DSM applications. Active correlation tracking is used to determine the affinity, or amount of ...
Kritchalach Thitikamol, Peter J. Keleher
ICNP
1999
IEEE
15 years 4 months ago
Scaling End-to-End Multicast Transports with a Topologically-Sensitive Group Formation Protocol
While the IP unicast service has proven successful, extending end-to-end adaptation to multicast has been a difficult problem. Unlike the unicast case, multicast protocols must su...
Sylvia Ratnasamy, Steven McCanne
DAC
2009
ACM
16 years 20 days ago
A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
Shiyan Hu, Zhuo Li, Charles J. Alpert