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» Zero overhead watermarking technique for FPGA designs
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89
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TVLSI
1998
83views more  TVLSI 1998»
15 years 21 days ago
Low overhead fault-tolerant FPGA systems
— Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
John Lach, William H. Mangione-Smith, Miodrag Potk...
101
Voted
DAC
1999
ACM
16 years 2 months ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
John Lach, William H. Mangione-Smith, Miodrag Potk...
114
Voted
TCAD
2008
92views more  TCAD 2008»
15 years 15 days ago
IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
Aijiao Cui, Chip-Hong Chang, Sofiène Tahar
DAC
1998
ACM
16 years 2 months ago
Robust IP Watermarking Methodologies for Physical Design
Increasingly popular reuse-based design paradigms create a pressing need for authorship enforcement techniques that protect the intellectual property rights of designers. We devel...
Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, ...
DAC
1999
ACM
16 years 2 months ago
Behavioral Synthesis Techniques for Intellectual Property Protection
? The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic wa...
Inki Hong, Miodrag Potkonjak