35 search results - page 5 / 7 » Zero overhead watermarking technique for FPGA designs |
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
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ISLPED
2010
ACM
14 years 9 months ago
2010
ACM
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
TVLSI
2011
14 years 4 months ago
2011
Abstract—Bitstream compression is important in reconfigurable system design since it reduces the bitstream size and the memory requirement. It also improves the communication ba...
IH
1998
Springer
15 years 1 months ago
1998
Springer
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP protection methods in finding ...