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» Ziggurat-based Hardware Gaussian Random Number Generator
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VTS
2005
IEEE
96views Hardware» more  VTS 2005»
15 years 3 months ago
Pseudo-Functional Scan-based BIST for Delay Fault
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
15 years 3 months ago
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Ca...
DATE
2005
IEEE
129views Hardware» more  DATE 2005»
15 years 3 months ago
Exploiting Dynamic Workload Variation in Low Energy Preemptive Task Scheduling
A novel energy reduction strategy to maximally exploit the dynamic workload variation is proposed for the offline voltage scheduling of preemptive systems. The idea is to construc...
Lap-Fai Leung, Chi-Ying Tsui, Xiaobo Sharon Hu
DATE
2005
IEEE
88views Hardware» more  DATE 2005»
15 years 3 months ago
System Synthesis for Networks of Programmable Blocks
The advent of sensor networks presents untapped opportunities for synthesis. We examine the problem of synthesis of behavioral specifications into networks of programmable sensor ...
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank ...
ICCAD
2001
IEEE
192views Hardware» more  ICCAD 2001»
15 years 6 months ago
BOOM - A Heuristic Boolean Minimizer
We present a two-level Boolean minimization tool (BOOM) based on a new implicant generation paradigm. In contrast to all previous minimization methods, where the implicants are ge...
Jan Hlavicka, Petr Fiser