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DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 4 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
DATE
2004
IEEE
105views Hardware» more  DATE 2004»
15 years 1 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
101
Voted
TAP
2010
Springer
134views Hardware» more  TAP 2010»
14 years 7 months ago
Testing First-Order Logic Axioms in Program Verification
Program verification systems based on automated theorem provers rely on user-provided axioms in order to verify domain-specific properties of code. However, formulating axioms corr...
Ki Yung Ahn, Ewen Denney
SIGMOD
2000
ACM
141views Database» more  SIGMOD 2000»
15 years 1 months ago
Counting, Enumerating, and Sampling of Execution Plans in a Cost-Based Query Optimizer
Testing an SQL database system by running large sets of deterministic or stochastic SQL statements is common practice in commercial database development. However, code defects oft...
Florian Waas, César A. Galindo-Legaria
EUROCAST
1997
Springer
156views Hardware» more  EUROCAST 1997»
15 years 1 months ago
A Computational Model for Visual Size, Location and Movement
The ability to detect object size, location and movement is essential for a visual system in either a biological or man made environment. In this paper we present a model for esti...
Miguel Alemán-Flores, K. Nicholas Leibovic,...