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ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
ICCAD
2009
IEEE
106views Hardware» more  ICCAD 2009»
14 years 7 months ago
An efficient pre-assignment routing algorithm for flip-chip designs
The flip-chip package is introduced for modern IC designs with higher integration density and larger I/O counts. In this paper, we consider the pre-assignment flip-chip routing pr...
Po-Wei Lee, Chung-Wei Lin, Yao-Wen Chang, Chin-Fan...
ICCAD
2009
IEEE
135views Hardware» more  ICCAD 2009»
14 years 7 months ago
Enhanced reliability-aware power management through shared recovery technique
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...
Baoxian Zhao, Hakan Aydin, Dakai Zhu
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
14 years 7 months ago
Pre-bond testable low-power clock tree design for 3D stacked ICs
Pre-bond testing of 3D stacked ICs involves testing individual dies before bonding. The overall yield of 3D ICs improves with prebond testability because designers can avoid stack...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
14 years 7 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
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