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ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
15 years 3 months ago
The Molen FemtoJava Engine
This paper presents the Molen FemtoJava engine that is extended with concepts taken from the Molen polymorphic processor. This allows for the existing FemtoJava to be augmented wi...
Júlio C. B. de Mattos, Stephan Wong, Luigi ...
ASAP
2006
IEEE
145views Hardware» more  ASAP 2006»
15 years 3 months ago
2D-VLIW: An Architecture Based on the Geometry of Computation
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...
Ricardo Santos, Rodolfo Azevedo, Guido Araujo
ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
15 years 3 months ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee
ASAP
2006
IEEE
110views Hardware» more  ASAP 2006»
15 years 3 months ago
Loop Transformation Methodologies for Array-Oriented Memory Management
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
Florin Balasa, Per Gunnar Kjeldsberg, Martin Palko...
ASAP
2006
IEEE
124views Hardware» more  ASAP 2006»
14 years 11 months ago
Low Complexity Design of High Speed Parallel Decision Feedback Equalizers
This paper proposes a novel parallel approach for pipelining of nested multiplexer loops to design high speed decision feedback equalizers (DFEs) based on look-ahead techniques. I...
Daesun Oh, Keshab K. Parhi