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ASAP
2006
IEEE
14 years 10 days ago
2006
IEEE
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
ASAP
2006
IEEE
14 years 10 days ago
2006
IEEE
An increasing computational demand is placed on the image processing capacity of current and future smart cameras. SIMD processor architectures provide an efficient solution becau...
ASAP
2006
IEEE
13 years 8 months ago
2006
IEEE
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
ASAP
2006
IEEE
13 years 8 months ago
2006
IEEE
Abstract--The growth of high-performance application in computer graphics, signal processing and scientific computing is a key driver for high performance, fixed latency, pipelined...
ASAP
2006
IEEE
13 years 10 months ago
2006
IEEE
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the prim...