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ASPDAC
2000
ACM
133views Hardware» more  ASPDAC 2000»
15 years 1 months ago
A VLSI implementation of the blowfish encryption/decryption algorithm
We propose an efficient hardware architecture for the Blowfish algorithm [1]. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-reschedul...
Michael C.-J. Lin, Youn-Long Lin
ASPDAC
2000
ACM
99views Hardware» more  ASPDAC 2000»
15 years 2 months ago
Analysis of power-clocked CMOS with application to the design of energy-recovery circuits
⎯ This paper presents our research results on power-clocked CMOS design. First we provide algebraic expressions and describe properties of clocked signals. Next two types of powe...
Massoud Pedram, Xunwei Wu
ASPDAC
2000
ACM
89views Hardware» more  ASPDAC 2000»
15 years 2 months ago
Circuit performance oriented device optimization using BSIM3 pre-silicon model parameters
We propose a circuit performance oriented device optimization methodology using pre-silicon parameters and critical paths which represent the performance of the chip. Based on our...
Mikako Miyama, Shiro Kamohara
ASPDAC
2000
ACM
83views Hardware» more  ASPDAC 2000»
15 years 2 months ago
Low-power design of sequential circuits using a quasi-synchronous derived clock
– This paper presents a novel circuit design technique to reduce the power dissipation in sequential circuits by generating a quasi-synchronous derived clock from the master cloc...
Xunwei Wu, Jian Wei, Massoud Pedram, Qing Wu
ASPDAC
2000
ACM
78views Hardware» more  ASPDAC 2000»
15 years 2 months ago
A sigma-delta modulation based BIST scheme for mixed-signal circuits
In this work, we present the analysis of a built-in self-test (BIST) scheme for mixed-signal circuits that is intended to provide on-chip stimulus generation and response analysis...
Jiun-Lang Huang, Kwang-Ting Cheng