A virtual 3-D extractor of the single dielectric is presented in this paper. In the indirect boundary integral equations, the plane charge distribution on the surface of conductors...
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Abstract-- We are proposing "PPRAM-Link": a new highspeed communication standard for merged-DRAM/logic SoC architecture. PPRAM-Link standard is composed of physical/logic...
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...