- This paper presents a comparison between three different high-level modeling approaches for embedded systems design, focusing on systems that require dataflow models. The propose...
Lisane B. de Brisolara, Leandro Buss Becker, Luigi...
The sustained miniaturization of VLSI feature size presents great challenges to sub-wavelength photolithography and requests usage of many Resolution Enhancement Techniques (RET)....
- In today’s power/ground(P/G) network design, on-chip decoupling capacitors(decaps) are usually made of MOS transistors with source and drain connected together. The gate leak...
— As we are entering the network-on-chip era and system communication is becoming a dominating factor, comon abstraction and synthesis are becoming the integral part of system de...
-- This paper presents a novel global routing algorithm, AT-PO-GR, to minimize the routing area under both congestion, timing, and RLC crosstalk constraints. The proposed algorithm...