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ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
14 years 11 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
ASPDAC
2005
ACM
90views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Register placement for low power clock network
In modern VLSI designs, the increasingly severe power problem requests to minimize clock routing wirelength so that both power consumption and power supply noise can be alleviated...
Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qian...
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Speed and voltage selection for GALS systems based on voltage/frequency islands
Due to increasing clock speeds and shrinking technologies, distributing a single global clock signal throughout a chip is becoming a difficult and challenging proposition. In this...
Koushik Niyogi, Diana Marculescu
ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Optimal placement by branch-and-price
— Circuit placement has a large impact on all aspects of performance; speed, power consumption, reliability, and cost are all affected by the physical locations of interconnected...
Pradeep Ramachandaran, Ameya R. Agnihotri, Satoshi...
ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
14 years 11 months ago
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...
Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioann...