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ASPDAC
2005
ACM
73views Hardware» more  ASPDAC 2005»
15 years 3 months ago
An-OARSMan: obstacle-avoiding routing tree construction with good length performance
- Routing is one of the important steps in VLSI/ULSI physical design. The rectilinear Steiner minimum tree (RSMT) construction is an essential part of routing. Since macro cells, I...
Yu Hu, Tong Jing, Xianlong Hong, Zhe Feng 0002, Xi...
ASPDAC
2005
ACM
127views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Clock network minimization methodology based on incremental placement
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
Liang Huang, Yici Cai, Qiang Zhou, Xianlong Hong, ...
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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Power estimation starategies for a low-power security processor
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
Yen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling C...
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Making fast buffer insertion even faster via approximation techniques
Abstract— As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing...
Zhuo Li, Cliff C. N. Sze, Charles J. Alpert, Jiang...