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ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
13 years 8 months ago
Design and design automation of rectification logic for engineering change
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang...
ASPDAC
2005
ACM
118views Hardware» more  ASPDAC 2005»
13 years 8 months ago
Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction
This paper proposes a novel wideband modeling technique for high-performance RF passives and linear(ized) analog circuits. The new method is based on a recently proposed sdomain h...
Zhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He
ASPDAC
2005
ACM
103views Hardware» more  ASPDAC 2005»
13 years 8 months ago
MAIA: a framework for networks on chip generation and verification
- The increasing complexity of SoCs makes networks on chip (NoC) a promising substitute for busses and dedicated wires interconnection schemes. However, new tools need to be develo...
Luciano Ost, Aline Mello, José Palma, Ferna...
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
13 years 8 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
ASPDAC
2005
ACM
146views Hardware» more  ASPDAC 2005»
13 years 8 months ago
High-level synthesis for DSP applications using heterogeneous functional units
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edw...