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    ASPDAC
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    Overview on Low Power SoC Design Technology
    15 years 6 months ago
    Overview on Low Power SoC Design Technology
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    Kimiyoshi Usami
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    ASPDAC
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    Meeting with the Forthcoming IC Design "The Era of Power, Variability and NRE Explosion and a Bit of the Future"
    15 years 6 months ago
    Meeting with the Forthcoming IC Design "The Era of Power, Variability and NRE Explosion and a Bit of the Future"
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    Takayasu Sakurai
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    ASPDAC
    2007
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    81views Hardware» more  ASPDAC 2007»
    CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time
    15 years 6 months ago
    CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time
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    Jorgen Peddersen, Sri Parameswaran
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    ASPDAC
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    DFM reality in sub-nanometer IC design
    15 years 6 months ago
    DFM reality in sub-nanometer IC design
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    N. Verghese, P. Hurat
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    ASPDAC
    2007
    ACM
    121views Hardware» more  ASPDAC 2007»
    A 0.35um CMOS 1, 632-gate-count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI
    15 years 6 months ago
    A 0.35um CMOS 1, 632-gate-count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI
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    M. Watanabe, F. Kobayashi
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