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aspdac 2010
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Rule-based optimization of reversible circuits
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Mona Arabzadeh, Mehdi Saeedi, Morteza Saheb Zamani
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LibGALS: a library for GALS systems design and modeling
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Wei-Tsun Sun, Zoran Salcic, Avinash Malik
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Design and chip implementation of an instruction scheduling free ubiquitous processor
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Masa-Aki Fukase, Ryosuke Murakami, Tomoaki Sato
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Buffered clock tree sizing for skew minimization under power and thermal budgets
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Krit Athikulwongse, Xin Zhao, Sung Kyu Lim
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Graph partition based path selection for testing of small delay defects
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Zijian He, Tao Lv, Huawei Li, Xiaowei Li
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