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DAC
2005
ACM
15 years 2 months ago
Logic soft errors in sub-65nm technologies design and CAD challenges
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 5 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 5 months ago
A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow
The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable sys...
K. Siozios, Dimitrios Soudris, Adonios Thanailakis
125
Voted
CAD
2005
Springer
15 years 4 days ago
Shape-based searching for product lifecycle applications
Estimates suggest that more than 75% of engineering design activity comprises reuse of previous design knowledge to address a new design problem. Reusing design knowledge has grea...
Natraj Iyer, Subramaniam Jayanti, Kuiyang Lou, Yag...
106
Voted
CAD
2005
Springer
15 years 4 days ago
Drawing curves onto a cloud of points for point-based modelling
Point-based geometric models are gaining popularity in both the computer graphics and CAD fields. A related design/modelling problem is the focus of the reported research: drawing...
Phillip N. Azariadis, Nickolas S. Sapidis