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DGO
2004
15 years 1 months ago
2004
VRCAI
2004
ACM
15 years 5 months ago
2004
ACM
CGA
2004
14 years 11 months ago
2004
CAI
2004
Springer
14 years 11 months ago
2004
Springer
The dual core strategy allows to construct a fail-silent processor from two instances (master/checker) of any arbitrary standard processor. Its main drawbacks are its vulnerability...
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CAI
2004
Springer
14 years 11 months ago
2004
Springer
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...