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CAL
2007
14 years 9 months ago
Nahalal: Cache Organization for Chip Multiprocessors
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. We...
CAL
2005
14 years 9 months ago
On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor
Previous research on runahead execution took it for granted as a prefetch-only technique. Even though the results of instructions independent of an L2 miss are correctly computed d...
Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt
CAL
2004
14 years 9 months ago
An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori
In this paper we present a methodology to design fault-tolerant routing algorithms for regular direct interconnection networks. It supports fully adaptive routing, does not degrade...
María Engracia Gómez, José Du...
CAL
2004
14 years 9 months ago
Globally Adaptive Load-Balanced Routing on Tori
We introduce a new method of adaptive routing on k-ary n-cubes, Globally Adaptive Load-Balance (GAL). GAL makes global routing decisions using global information. In contrast, most...
Arjun Singh, William J. Dally, Brian Towles, Amit ...
CAL
2004
14 years 9 months ago
Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
We compare techniques that dynamically scale the voltage of individual network links to reduce power consumption with an approach in which all links in the network are set to the s...
J. M. Stine, N. P. Carter