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CAL
2006
14 years 9 months ago
An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation
Multiple core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and ...
James Donald, Margaret Martonosi
CAL
2006
14 years 9 months ago
User-Driven Frequency Scaling
Abstract-- We propose and evaluate User-Driven Frequency Scaling (UDFS) for improved power management on processors that support Dynamic Voltage and Frequency Scaling (DVFS), e.g, ...
Arindam Mallik, Bin Lin, Gokhan Memik, Peter A. Di...
CAL
2006
14 years 9 months ago
Subtleties of Transactional Memory Atomicity Semantics
Abstract-- Transactional memory has great potential for simplifying multithreaded programming by allowing programmers to specify regions of the program that must appear to execute ...
Milo M. K. Martin, Colin Blundell, E. Lewis
CAL
2006
14 years 9 months ago
A Case for Compressing Traces with BDDs
Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
Graham D. Price, Manish Vachharajani
CAL
2006
14 years 9 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck