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MICRO
2000
IEEE
61views Hardware» more  MICRO 2000»
15 years 9 months ago
Reducing wire delay penalty through value prediction
In this work we show that value prediction can be used to avoid the penalty of long wire delays by predicting the data that is communicated through these long wires and validating...
Joan-Manuel Parcerisa, Antonio González
MTDT
2000
IEEE
129views Hardware» more  MTDT 2000»
15 years 9 months ago
Using GLFSRs for Pseudo-Random Memory BIST
In this work, we present the application of Generalized Linear Feedback Shift Registers (GLFSRs) for generation of patterns for pseudo-random memory Built-In SelfTest (BIST). Rece...
Michael Redeker, Markus Rudack, Thomas Lobbe, Dirk...
NDSS
2000
IEEE
15 years 9 months ago
Analysis of a Fair Exchange Protocol
We analyze an optimistic contract signing protocol of Asokan, Shoup, and Waidner as a case study in the applicability of formal methods to verification of fair exchange protocols...
Vitaly Shmatikov, John C. Mitchell
RTCSA
2000
IEEE
15 years 9 months ago
Effect of scheduling jitter on end-to-end delay in TDMA protocols
In this paper, we address the problem of guaranteeing end-to-end (ETE) delay of packets in a distributed system where the technique of time division multiplex access (TDMA)is adop...
Libin Dong, Rami G. Melhem, Daniel Mossé
RTCSA
2000
IEEE
15 years 9 months ago
Tracking Real-Time Systems Requirements
One of the hard problems in maintaining real-time systems requirements is to keep track of the impact of resource usage on the applications. Often times, it is not sufficient to ...
Aloysius K. Mok